A vital part of system-on-chip (SoC, ASIC and FPGA design is the specification of hardware/software control registers for accessing a memory-mapped I/O address in the hardware. In a typical SoC utilizing several processors, this can require as many as 7-10,000 individual registers.
Online PR News – 22-May-2009 – – Register specification is probably the main point of intersection between a chip design team and the team developing embedded software / firmware for that silicon. A well-documented silicon IP block is one that has an accurate and clear description of the registers, amongst other things, and such IP blocks are typically easier to re-use.
Electronic Design Automation (EDA) design tools such as Verieda (http://www.verieda.com) automate and validate register specification and code generation for hardware, firmware, hardware verification, testing and documentation. The output from such tools typically includes RTL (Register Transfer Level) code for Verilog and VHDL; firmware elements such as C header files and C++ Class files; documentation in e.g. HTML and RTF format; and test benches for hardware validation. It is also common to be able to interoperate with other tools using standards-based XML descriptions such as those conforming to IP-XACT.
EDA tools simplify the work of the chip designer, but a further enhancement to the silicon design workflow can be achieved by integrating EDA tools with a Document Management System (DMS) such as CogniDox (http://www.cognidox.com). EDA-generated files need to be captured, reviewed, issued, approved and published in a controlled manner, and the EDA tool user needs to be integrated with other members of the product development team.
With this in mind, Cognidox and Verieda have integrated the document control software of the former and the register set design tool of the latter. A SOAP interface allows publishing directly from the Verieda application to CogniDox. When the Verieda user chooses, there is an option to upload the generated RTL, C header files, and documentation as a zip file into CogniDox via its pluggable external API, either as a new part number if uploaded for the first time, or as a new version of an existing part number. Once in CogniDox, the document can be reviewed and approved as normal, then optionally published via an extranet website to customers if that is required.
"Register definitions are critical in the hand off between hardware and software design", said Phil Wise (Verieda Ltd) "and CogniDox helps manage the approval process of those artifacts".
Commenting on the integration, Paul Walsh (Cognidox Ltd) said: "We consider CogniDox to be the first-choice DMS for semiconductor companies, so we are keen to integrate design flow tools with CogniDox. As time-to-market for silicon gets shorter, the more that can be done to automate processes, the better."
CogniDox and Verieda are both web-based systems, which means users require only a web browser and a network connection to use them. Verieda differs from other expensive EDA tools in that it is offered as on-demand Software-as-a-Service, which removes the need for hardware and IT installation/support. Both Verieda and CogniDox have a low cost of entry, and are aimed at even the smallest company or start-up.
Cognidox Limited, St John's Innovation Centre, Cowley Road, Cambridge CB4 0WS, UK
Limited company registered in England and Wales, No. 06506232
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Telephone +44 (0) 1223 911986
Verieda Limited, 40 Vermuyden Way, Cambridge, CB24 4TA, UK
Limited company registered in England and Wales, No. 06912606