SILICON LABS OSCILLATORS MINIMIZE JITTER AND COST IN COMMUNICATIONS AND EMBEDDED COMPUTING SYSTEMS
03/15/2011

Silicon Laboratories Inc. (NASDAQ: SLAB), a leader in high-performance, analog-intensive, mixed-signal ICs, today introduced a family of crystal oscillators (XOs) and voltage-controlled XOs (VCXOs) designed to minimize jitter, system cost and design complexity for a wide range of high-performance, cost-sensitive applications up to 250 MHz.

Online PR News – 15-March-2011 – – AUSTIN, Texas – Mar. 14, 2011 – Silicon Laboratories Inc. (NASDAQ: SLAB), a leader in high-performance, analog-intensive, mixed-signal ICs, today introduced a family of crystal oscillators (XOs) and voltage-controlled XOs (VCXOs) designed to minimize jitter, system cost and design complexity for a wide range of high-performance, cost-sensitive applications up to 250 MHz. The new Si51x XO/VCXO family provides best-in-class frequency flexibility for networking, communications, storage, server, embedded computing and broadcast video systems and also targets FPGA, serializer/deserializer (SerDes) and multi-rate clocking applications.

The latest addition to Silicon Labs’ portfolio of frequency-flexible crystal oscillators, the Si51x family includes the industry’s first I2C-programmable, low-jitter XOs and the first dual-frequency XO/VCXOs in space-saving 3.2 mm x 5 mm packages. The Si51x family offers drop-in compatibility with fixed-frequency XOs and surface acoustic wave (SAW) oscillators while providing superior frequency flexibility and power supply noise rejection. Featuring 0.8 picosecond (ps) rms jitter across the entire frequency range, the Si51x XO/VCXOs provide up to 2.5X lower jitter than traditional factory-programmable oscillators.

The Si51x XO/VCXOs feature Silicon Labs’ patented DSPLL® technology to generate any frequency from 100 kHz to 250 MHz with 26 parts per trillion frequency programming resolution. Unlike traditional crystal and SAW oscillators that require a unique crystal or SAW resonator for each frequency, the Si51x devices pair a DSPLL clock IC with a single low-frequency crystal. Specific device configurations are programmed during outgoing tests. This efficient mass-customization approach minimizes lead times because there is no need to customize crystals for each new frequency. Silicon Labs can respond quickly to demand upsides, reducing customer inventory stocking levels and associated costs. High reliability and quality are maintained because all Si51x oscillator products share a common manufacturing flow.

Silicon Labs’ Si512/3 dual-frequency XOs are ideally suited for replacing two discrete XOs and a multiplexer in networking, broadcast video and other applications that use multi-rate SerDes devices and FPGAs. The Si514 I2C-programmable XO can be used to replace clock generators that require an external crystal for local clock generation, simplifying design while providing tighter, guaranteed stability by leveraging the Si514’s internal crystal. The Si514 also can be used to replace direct digital synthesis (DDS) clock ICs and digital PLLs that typically use a digital-to-analog converter (DAC) and VCXO for clock synchronization. The Si514 is a flexible choice for prototyping since it can be reprogrammed in-system to any frequency.

The Si51x XO/VCXOs support a wide range of voltage options (1.8, 2.5 and 3.3 V) and output formats (LVPECL, LVDS, CMOS and HCSL), making them ideal for applications that require varying frequencies, formats and power supply voltages. All Si51x devices include on-chip voltage regulation, minimizing the impact of system-level power supply noise on clock jitter and keeping jitter below 1 ps rms jitter even in noisy system environments. This noise immunity is advantageous in FPGA-based systems that rely on tightly regulated switched mode power supplies. By filtering power supply noise inside the device, Si51x XO/VCXOs can be mounted next to FPGAs without requiring external low drop-out regulators for power supply filtering.

“Silicon Labs’ new Si51x XO/VCXO family delivers an optimal combination of low jitter performance, frequency agility, high reliability and small footprint for high-performance clocking applications,” said Mike Petrowski, general manager of Silicon Labs’ timing products. “By combining our efficient manufacturing flow with device customization and programmability, Silicon Labs can offer any-frequency Si51x XO/VCXOs with short, reliable lead times, accelerating product design cycles and simplifying the supply chain.”

Pricing and Availability
Si510/511 single-frequency XO pricing in 10,000-unit quantities ranges from $2.10 to $3.69, depending on ordering options. Si514 I2C-programmable XO pricing in 10,000-unit quantities ranges from $2.71 to $10.23. The Si5XX-PROG-EVB development kit, priced at $125, is available now for evaluation of I2C-programmable XO/VCXOs. The Si5XX-EVB, priced at $45, is used to evaluate single- and dual-frequency XO/VCXOs. (All prices are in USD.) For more information, please visit www.silabs.com/pr/clocksoscillators.

Silicon Laboratories Inc.
Silicon Laboratories is an industry leader in the innovation of high-performance, analog-intensive, mixed-signal ICs. Developed by a world-class engineering team with unsurpassed expertise in mixed-signal design, Silicon Labs’ diverse portfolio of patented semiconductor solutions offers customers significant advantages in performance, size and power consumption. For more information about Silicon Labs, please visit www.silabs.com.

Cautionary Language
This press release may contain forward-looking statements based on Silicon Laboratories’ current expectations. These forward-looking statements involve risks and uncertainties. A number of important factors could cause actual results to differ materially from those in the forward-looking statements. For a discussion of factors that could impact Silicon Laboratories' financial results and cause actual results to differ materially from those in the forward-looking statements, please refer to Silicon Laboratories’ filings with the SEC. Silicon Laboratories disclaims any intention or obligation to update or revise any forward-looking statements, whether as a result of new information, future events or otherwise.